EDA Design Page 115

HDL Companion is the HDL designer\’s Swiss army knife. It will help you to get and keep a good overview of any HDL design, including third party IP, legacy code and other HDL sources. Complete design directories and design files are dragged into HDL Companion and a complete design overview is created in seconds, uncovering information regarding numerous aspects of the design. The GUI offers many ways to navigate through the design and explore the details you\’re looking for. The embedded fuzzy parsers accept any Verilog, VHDL or mixed HDL design code; even if the code is incomplete or contains errors. Syntactically correct HDL can also be linted to find problems not reported by the compilers. HDL Companion has a...

Want a powerful, yet easy to use simulation environment? SynaptiCAD\’s simulation and debugging tools provide a standard interface for controlling all of your simulation tools. SynaptiCAD\’s timing diagram editors have the most extensive and accurate timing analysis features available in any timing diagram editor on the market including delay correlation, reconvergent fan-out, and clocks that model jitter and buffer delays. Three different levels of editing let you pick the best price and feature set for your application. Free yourself from the time-consuming process of manually writing Verilog, VHDL, and SystemC testbenches. Generate them graphically from timing diagrams.SynaptiCAD provides 3 levels of test bench generation to meet all your design needs. SynaptiCAD offers support for the latest test equipment and emulation...

SystemVue is an EDA environment for electronic system-level (ESL) design that enables system architects and algorithm developers to innovate the physical layer (PHY) of next-generation wireless and aerospace/defense communications systems. The systemvue Communications Architect is the core environment, with essential simulators and libraries. It includes many capabilities that are not found in other ESL tools, or are only available as added-cost options. About Agilent Agilent Technologies, a spin-off of Hewlett-Packard Company, broke records on Nov. 18, 1999 as the largest initial public offering (IPO) in Silicon Valley history. The US $2.1 billion raised from that IPO was a sharp contrast to the $538 in working capital that founders Bill Hewlett and Dave Packard began with in 1938. From a small...

EMPro 2011.07 adds the following new and improved capabilities: New Eigenmode Solver – quickly find resonant frequencies for cavity structures FDTD Speed Improvements – GPU acceleration support for objects with conformal mesh FEM Speed Improvements – iterative solver now supports CPU multithreading Cadence Allegro™ Interface – import PCB designs for 3D EM analysis 3D Modeling GUI Enhancements – toolbars, hotkeys, cutplanes and more EMPro 3D EM Simulation Software Electromagnetic Professional (EMPro) is Agilent EEsof EDA\’s EM simulation software design platform for analyzing the 3D electromagnetic (EM) effects of components such as high-speed and RF IC packages, bondwires, antennas, on-chip and off-chip embedded passives and PCB interconnects. EMPro EM simulation software features a modern design, simulation and analysis environment, high capacity...

GeneSpring GX provides powerful, accessible statistical tools for fast visualization and analysis of expression and genomic structural variation data. Designed specifically for the needs of biologists, GeneSpring GX offers an interactive desktop computing environment that promotes investigation and enables understanding of microarray data within a biological context.Multi-omic analysis with Agilent’s GeneSpring 11.5 bioinformatics Integrative platform for multi-omic data analysis Transcriptomic analysis Genomic copy number analysis Genome-wide association analysis Proteomic and metabolomic analysis Built-in ID browser automates database and spectral library searches Comprehensive analytical and visualization toolkit Statistical tools for testing differential expression Pattern discovery Extensible functionality with Jython and R Intuitive graphical displays Integrated toolbox for pathway analysis and biological contextualization Scalable architecture GeneSpring Licenses GeneSpring provides powerful, accessible statistical...

Vista™ is a complete TLM 2.0-based solution for architecture design, analysis, verification and virtual prototyping enabling system architects and SoC designers to make viable architecture decisions and enabling hardware and software engineers validate their hardware and software. This is accomplished by prototyping, debugging and analyzing complex systems early in the design cycle, even before RTL to achieve predictable and productive design process, and first pass success.product:Mentor.Graphics.Vista.v3.12 Lanaguage:english Platform:Linux Size:1CD

Agilent Technologies introduced the latest verion of their Advanced Design System and Electromagnetic Professional software. ADS 2011.10 RF design software and EMPro 2011.11 3-D modeling and simulation platform include enhancements to speed and improve RF design and verification. AADS 2011.10 will ship later this month. EMPro 2011.11 will be available for download in late October. Pricing for the ADS and EMPro environments start at $8,000 and $7,000, respectively. ADS 2011.10 EnhancementsAgilent ADS 2011.10 RF design software A design documentation notebook that makes it easy to create and share all or selected views of schematics, layout and data displays, and generate PDF and PostScript outputs files. The ability to more easily create native air bridges in ADS layout and the substrate...

PLECS Standalone PLECS® Standalone is an autonomous software package for time-domain simulation of power electronic systems. If you want to be independent from other simulation platforms, PLECS Standalone gives you the all-in-one solution for modeling complex electrical circuits and sophisticated controls in a single environment. Thanks to its optimized engine, PLECS Standalone runs much faster than the PLECS Blockset. With the comprehensive block library, PLECS Standalone offers a cost-effective yet powerful solution for dynamic system simulation in general.Dedicated solvers PLECS Standalone comes with an own engine for solving the circuit equations. The user can choose between variable-step and fixed-step solvers. Variable time-step solvers are generally preferred for accurate and efficient simulations, because they adopt the step size during the simulation...

IAR Embedded Workbench Efficient and reliable code is a must in an embeddedapplication. IAR Embedded Workbench is theworld-leading C/C++ compiler and debuggertool suite for applications based on 8-, 16-, and32-bit MCUs.IAR Embedded Workbench� for AVR is an integrated development environment for building and debugging embedded applications. It provides extensive support for Atmel AVR devices and generates very compact and efficient code. Built-in plug-ins to various Atmel emulators and RTOSs are included in standard edition.� Fully integrated development environment for building and debug ging embedded applications� Automatic checking of MISRA C rules for security-critical applica tions� Most compact and efficient code� Extensive hardware and RTOS-aware debugging support in C-SPY Debugger� Flying start with ready-made device configuration files and example projects� Same...

Major CADSTAR Enhancements… Constraint Browser CADSTAR now supports a new Constraint Browser tool which allows constraints to be set during schematic development. Alongside this is an enhanced constraint management system that makes the Constraint Browser and Constraint Manager the master when handling constraints, allowing for more advanced constraint management. Enhanced Topology Support Please note that this functionality will not be available in the initial web release of CADSTAR 13.0. It will be delivered in the media release. In the meantime, it will be necessary to continue to define topologies based on pin_branch and pin_order attributes, which can be set in Constraint Browser or Constraint Manager. When using the new constraint management system a wider range of net topologies are available...