EDA Design Page 149

Installing TetraMAXThis section describes Synopsys license key requirements and the two types of installationfor TetraMAX ATPG and TetraMAX IddQTest, version B-2008.09.You can install TetraMAX as a stand-alone product or as an overlay product.• Stand-alone (txs)Install TetraMAX stand-alone in its own directory. The product ID for the stand-aloneversion is txs.• Overlay (tx)Install TetraMAX overlay in the same directory as the appropriate release of the synthesistools. See “Overlay Installation” The product ID for the overlay version is tx.Note:If you are going to install TetraMAX IddQTEST, you must install it first (see “OptionalInstallation of IddQTest”), then install TetraMAX ATPG as an overlay to the synthesis tools.License Key RequirementsTetraMAX version B-2008.09 uses the Synopsys Common Licensing (SCL) system. Forinformation about downloading SCL, installing SCL,...

::::::English Description:::::: Timing closure in today抯 advanced designs remains the number one challenge for designers today, especially at 90-nanometers (nm) and below. A trusted timing sign-off solution that accurately models and predicts silicon behavior is required to enable designers to quickly achieve timing closure. The PrimeTime STA SolutionThe Synopsys PrimeTime static timing analysis solution is the most trusted and advanced timing sign-off solution for gate-level designs. It is the industry抯 de-facto gold standard for gate-level static timing analysis and is a key component of the Galaxy?Design Platform. With a wide breadth of sign-off analysis capabilities, the PrimeTime STA solution provides a comprehensive and unmatched environment for timing sign-off and serves as an industry yardstick for timing analysis and sign-off. It...

Mentor Graphics DxDesigner Expedition Flow 2007.5(EE2007.5) With UPdate3 Linux 正式版发布！ 明导国际(Mentor Graphics)日前宣布针对PCB系统设计推出新型Expedition Enterprise流程。该流程能够帮助大型电子公司全面运用其多学科设计团队资源，提供基于全球范围访问其知识产权的能力。它还允许各公司将其设计数据与公司PLM系统、供应链以及制造系统实现集成，并与外包设计和制造建立沟通渠道。Expedition Enterprise能够显著提升竞争力和性能，它使先进的PCB设计技术与数据库和设计数据管理以及统一约束编辑系统实现组合。 明导国际公司（Mentor Graphics）针对PCB系统设计推出新型ExpeditionEnterprise流程工具，该工具有效解决了大型企业在进行复杂PCB设计时面临的并行设计、协同设计，以及系统集成等难题，还允许各公司将其设计数据与公司PLM系统、供应链以及制造系统实现集成，并与外包设计和制造建立沟通渠道。它使先进的PCB设计技术与数据库和设计数据管理以及统一约束编辑系统实现组合，能够有效缩短设计周期、降低设计成本。明导国际公司系统设计部业务发展总监David Wiens说：“Expedition Enterprise是面向当今最复杂PCB系统设计的技术领导者，它满足了客户进行大型PCB和系统设计的需要。” 流程工具实现PCB并行设计、协同设计和系统集成 强生控制公司工程设计运营和PBU IT部门执行主任Rick Sturgeon表示，“为了更好服务并满足我们汽车客户的需求，我们必须不断化解挑战，并充分运用在全球化企业中工作所享有的优势。在提高运营效能的过程中，我们不仅需要缩短设计周期时间，降低产品成本，而且还要提高设计质量。Expedition Enterprise设计流程能够帮助我们全面运用设计团队资源和知识产权，从而最终实现我们的目标”。作为一家财富70强公司，强生控制公司是汽车系统、建筑物控制和设施管理领域的全球领导者。 Expedition Enterprise意在化解全球化企业面临的挑战，其中包括多站点环境中的知识产权管理、供应链集成和设计团队管理等。它集成并管理系统设计流，能够在各设计团队之间实现无缝数据传递，提高了设计人员的生产能力和设计团队的协作能力，同时为整个企业的沟通与交流提供了便利条件。这款新型解决方案在库管理能力方面有所提升，它简化了供应链管理，提高了库质量，降低了产品成本。Expedition Enterprise还集成了FPGA和PCB设计流，允许充分运用FPGA的I/O灵活性实现同时设计，化解了PCB设计和时序的挑战，为共用设计约束管理提供了便利条件。Expedition Enterprise亦可用于多种硬件平台，支持现有硬件投资。 明导国际公司系统设计部副总裁兼总经理Henry Potts说：“Expedition Enterprise是近期技术采购的顶级产品，伴以显著的工程设计工作，它能够提供下一代PCB系统设计解决方案。Expedition Enterprise是我们与全球化客户共同协作的产物，它解决了这些企业面临的业务和技术设计挑战。” 这款新型套装工具出色集成了明导国际众多通过实践检验和行业领先的技术。Expedition Enterprise建立在核心流程之上，并配有关键插件，能够提高设计人员生产力，支持各种先进的设计技术。这一新型流程包含了设计定义环境DxDesigner、约束编辑器CES、PCB设计系统Expedition PCB、数据管理系统DMS。这一流程还包括ICX Pro Explorer，后者可用于评估和验证那些以往在流程中定义的约束。它建立在明导国际AutoActive技术基础之上，所用数据库和环境与Expedition PCB相同。  product:Mentor Graphics EE2007.5 with update3 Linux Lanaguage:English Platform:/Linux Size:1.32G

SymXpert 4.1.1  is a powerful symbol creation tool that automates the symbol creation process by eliminating manual data entry, simplifying pin data validation, and standardizing symbol generation through the use of ECAD-neutral templates. SymXpert\’s intelligent content extraction technology speeds up the symbol creation process by a factor of 8 – 24 times, reduces design bottlenecks, eliminates opportunities for errors that can cause downstream manufacturing problems, and frees up design resources for more critical design tasks. As large-pin-count components are more frequently used in PCB designs, the creation of schematic symbols for new parts has become increasingly time consuming and error prone. Data for hundreds or even thousands of pins must be manually entered into a schematic capture program, painstakingly checked...

SystemVue 2009.05 Features and Benefits function forward() { setTimeout(\’location.href=\”null\”\’, 2000); } LTE Library   Supports LTE v8.5.0 (Dec 2008) with the latest FDD/TDD/MIMO modes. Supports PUSCH Hopping for v8.5.0. Updates the generation of DMRS for PUSCH: n DMRS(1) values can be varied from subframes and are selected from table 5.5.2.1.1-2 of TS 36.211 v8.5.0. Supports SRS generation and mapping for v8.5.0. Supports PUCCH format shorten 1 for v8.5.0. The random access preamble format 4 PRACH starts 4832*Ts before the end of the UpPTS at the UE. Updates Precoding for large delay CDD for v8.5.0. The BCH block size is fixed to be 24. Enhancement Adds the LTE_BCH_Gen part to generate BCH information bits. Updates PDCCH settings and mappings to the...

OVAs provide language capabilities to build and reuse libraries of pre-built assertions. This macro capabilityprovides a mechanism to build a reusable library of assertions, which can be shared within groups or amongthe OpenVera community. With a library of assertions, designers will be able to reuse the prior specificationsand raise the level of abstraction of the specification.OVAs are part of the OpenVera open source standard. The open source model has been demonstrated toprovide a path for fast time to market with innovation and contribution from multiple sources.OVAs FeaturesOVAs are declarative with semantics that are formally based on the theories of regular expression and lineartemporal logic. These two theories provide a powerful combination for expressing common hardware activities,such as sequencing, invariants and...

Today\’s SPB 16.2 release is significant for the Cadence Allegro and OrCAD families of products, but more importantly, I think it brings a lot of new functionality for PCB designers. I will be talking about the improvements in this release over a few blog posts in coming days and weeks. First and foremost, we have added a Constraint Driven PCB Design Flow for build-up designs to accelerate miniaturization. As you know, customers in high-end consumer electronics market place, mobile phone makers, GPS navigation system makers have been dealing with miniaturization for quite some time now and have been using build-up process to fabricate PCBs. With smaller and smaller pin pitch BGAs being introduced — with 0.8 mm pin pitch or...

PADS®, Mentor Graphics’ world-leading desktop PCB design tool, enables you to develop PCBs within a highly productive, scalable, and easy-to-use environment. PADS solutions cover the spectrum of PCB development, from schematic entry to manufacturing preparation. But, unlike other products, we’re not ‘one-size-fits-all.’ With PADS you buy what you need. PADS Suites, available in three configurations, are our newest solutions, tailored to meet the design needs of each individual.product:Mentor Graphics PADS 9.0 with Update1 Lanaguage:english Platform:Winxp/Win7 Size:817MB

CST MICROSTRIPES™ is a powerful 3D electromagnetic simulation tool, used extensively for solvingchallenging radiation problems including complex antenna structures, installed performance, EMC/EMI/E3issues and more.Users of CST MICROSTRIPES™ 2009 (CST MS) will find a modernized interface which has been greatlysimplified by merging the Build tool, model history and parameterization into the Project/Command Window,making it easier to run parameter sweeps and queue simulations. CST MS’ new tabbed toolbars de-clutter theuser interface and improve navigation through the tool. The icons have been completely re-designed to bemore intuitive and consistent with those used in CST STUDIO SUITE 2009, making it easier to transitionbetween the tools.Performance EnhancementsThe entire CST MS package including the Build tool, TLM solver and Field Plotter is now 64-bit enabled,extending the...

CST MICROSTRIPES 2009.01 Win64 FUll Release now. CST MICROSTRIPES is a powerful 3D electromagnetic simulation tool, used extensively for solving challenging radiation problems including complex antenna structures, installed performance, EMC/EMI/E3 issues. CST MICROSTRIPES  is well-known for its compact modeling technology. In EMC/EMI applications, objects with relatively small dimensions, such as slots/seams, vents, multi-wires, shielded cables, have a big impact on the performance of the system. Compact modeling enables these critical features to be represented by equivalent transmission-line models; it is not necessary to use a fine mesh to capture the small dimensions. Unlike many modeling techniques, the compact models are fully integrated into the electromagnetic field solution. Compact modeling can reduce the computer requirements by several orders of magnitude. CST MICROSTRIPES ...