EDA Design Page 181

Mentor Graphics Vendor-Independent Flow 2006-IND2006 Linux 完整的PCB设计解决方案，包含具有强大功能的布局和模拟工具的概略图定义 ::::::English Description:::::: Mentor Graphics Announces Precision RTL Plus for FPGA Synthesis – Vendor-Independent Flow 2006 Linux(IND2006)  New Features for IND2006 ICX The following are the new features for ICX 3.6.0-ICX Pro simulator  -ICX Pro Waveform Analyzer with FFT   -Allegro 15.5 interface support  -Support for ndd-files with long property values I/O Designer-Concurrent design of FPGA and PCB through bi-directional communication between FPGA and PCB design environments-Optimize FPGA pin assignments for PCB routing and system performance  -Automatic symbol generation and fracturing  -I/O design data management  -FPGA constraints verification including Timing constraints  -Configurable power and ground PCB signal names -View of layout placement for I/O optimization –Automatic unravel nets  -Mapping between HDL and PCB signal names  -Import...

>::::::English Description:::::: Mentor Graphics Announces Precision RTL Plus for FPGA Synthesis – Vendor-Independent Flow 2006(IND2006)  New Features for IND2006 ICX The following are the new features for ICX 3.6.0-ICX Pro simulator  -ICX Pro Waveform Analyzer with FFT   -Allegro 15.5 interface support  -Support for ndd-files with long property values I/O Designer-Concurrent design of FPGA and PCB through bi-directional communication between FPGA and PCB design environments-Optimize FPGA pin assignments for PCB routing and system performance  -Automatic symbol generation and fracturing  -I/O design data management  -FPGA constraints verification including Timing constraints  -Configurable power and ground PCB signal names -View of layout placement for I/O optimization –Automatic unravel nets  -Mapping between HDL and PCB signal names  -Import PCB design wizard  -Full synchronisation wizard  -DMS corporate...

Raphael NXT is a true three-dimensional (3D) capacitance extractor that provides silicon-accurate self and coupling capacitances for IC design. Equipped with an ultrafast extraction engine, Raphael NXT complements Star-RCXT by extracting 3D capacitances of critical nets, cells, or blocks on the full-chip level. Raphael NXT supports the latest processes that include conformal dielectric layers, trapezoidal conductors, lithography effects, and metal fill, providing an accurate representation of the complex geometries found in interconnect structures. As a result, capacitance values extracted by Raphael NXT are closely correlated with Raphael, the gold-standard reference field solver, or silicon measurements. [b]Benefits[/b] Extraction of field solver朼ccurate capacitance for critical nets, cells, and blocks on the full-chip level Accounts for detailed process effects predominant in leadingedge nanoscale...

ynopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that Cypress Semiconductor Corp. has successfully taped out its West Bridge™ Antioch™ peripheral controller multimedia 3G/3.5G mobile phone integrated circuit (IC) using the Synopsys Galaxy™ design platform RTL-to- GDSII low-power solution, including the PrimeRail dynamic power network analysis solution. The multithreshold CMOS (MTCMOS) power gating feature in the Galaxy design platform enabled Cypress to complete its ultra-low-power design with world-class performance and optimized standby current. PrimeRail, a key component of the Galaxy design platform, enabled peak current analysis for the multiple power domains of the Power Gating-based design during physical implementation. \”For our mobile phone chip design, we needed a solution that could address peak current problems...

Synopsys CoCentric System Studio 2006.12 SP1是一个功能强大的系统级设计环境，主要用于面向创新性SoC设计中算法和系统架构的两个至关重要的系统级设计领域。算法设计涵盖了信号处理，例如移动通信、多媒体编码解码器、DSL和调制解调器。架构设计把正确的处理器、定制逻辑电路、总线、内存和外设相结合，以确保芯片得到最有效的利用，并对硬件和软件进行划分。采用Synopsys CoCentric System Studio可以完成硬件和软件要素的设计和集成工作。 　　 当今，系统级的设计主要采用C或C++语言来完成。System C公共标准的出现推动了系统级设计，使之成为了一个连贯的过程。其利用了一套通用的C++类库，精确地建立系统级芯片的硬件和进程的模型，建立模型的方法已不再是以往所采用的各种自行开发方法和工具等支离破碎的方法。 其与RTL验证之间良好的互操作性，通过全新建模技术，为同已有的设计相结合提供了解决方案。范围广泛的模型库和参考设计工具包(RDKs)将商业化设计跨越性地引入先进的无线、多媒体和电信技术标准中。 　   主要优点： 　　● 利用层次化、图形化和语言式的抽象技术，在CoCentric System Studio的统一环境中构造整个系统。 　　● 对设计进行可视化，以图形、示意图和符号视图、源代码视图、接口视图、标题视图的方式，轻易地掌握系统级芯片的复杂度。 　　● 对仿真虚拟环境中的系统级芯片进行完整的端到端系统仿真和分析 　　● 能够在费用较低的设计初期，查出和纠正系统级错误 　　● 消除了对建立可综合子模块模型的需求 　　● 能够验证包含自定时序，预充电的逻辑电路或动态电路的复杂单元 　　● 快速查出仿真模型与相应SPICE网表之间的不同之处 　　● 提供实现快速纠正单元失配现象的指导 ::::::English Description:::::: System Studio is the high performance model-based algorithm design and analysis tool, combining unmatched simulation performance and highest modeling efficiency, plus industry s best integration into the implementation design and verification flow. Algorithm design is an essential task in signal processing applications such as wireless telephony, multimedia codecs, DSL and cable modems. More than 50% of all mobile phones worldwide rely on algorithms designed with System Studio, making it the clear market leader. Design ChallengesThe design of Signal Processing Algorithms is a key discipline in...

# Automates verification and adjustment procedures# Intuitive user interface for automatic or manual-mode operation# Reporting capabilities for documenting results# For use by metrology laboratories and other qualified facilities# Support for Windows 2000 Service Pack 4 and XP only (no support for Windows 7/Vista)The NI Calibration Executive is a software tool for calibrating and adjusting I/O channels on National Instruments measurement devices. You can operate it in either automatic or manual mode through an intuitive user interface. In addition, the Calibration Executive provides reporting capabilities for documenting your calibration and adjustment results.Product:NI Calibration Executive 3.2 Lanaguage:english Platform:Winxp/Win7 Size:2.20G

The NI Motion Assistant speeds up the development and testing of motion applications by providing an easy-to-use interactive environment. You can convert any application developed using the NI Motion Assistant to C code or NI LabVIEW VIs for final machine deployment, eliminating the need for any additional programming. The NI Motion Assistant offers the ability to import motion profiles created in CAD or drafting packages using the widely accepted DXF file format. Using this feature with the NI patent-pending smart-contouring algorithm, you can implement precise motion profiles for cutting or scribing applications. The NI Motion Assistant works with National Instruments plug-in motion controllers for blended trajectory control and fully coordinated circular, linear, point-to-point, gearing, and vector-space control. It offers a...

::::::English Description:::::: HSIMplusHSIMplus™ 2007.03 Linux is a fully-integrated suite of tools for the design and verification of nanometer ICs, built upon the production-proven HSIM hierarchical Fast-SPICE simulator. HSIMplus exceeds the capabilities of competitor’s Fast-SPICE simulators, by providing a complete solution for analysis of the effects that dominate performance and reliability in silicon at 90nm and 65nm process nodes. HSIM® delivers superior performance and capacity over traditional SPICE-based simulators, by applying two innovative and proprietary techniques: Hierarchical Storage and Isomorphic Matching   Hierarchical StorageTraditional SPICE-based simulators employ matrix-solving algorithms that must flatten the hierarchy that designers build into their circuit, in order to simultaneously solve for all node voltages and branch currents at every time step in a simulation. The hierarchical solver...

:::::: HSIMplusHSIMplus™ 2007.03 is a fully-integrated suite of tools for the design and verification of nanometer ICs, built upon the production-proven HSIM hierarchical Fast-SPICE simulator. HSIMplus exceeds the capabilities of competitor’s Fast-SPICE simulators, by providing a complete solution for analysis of the effects that dominate performance and reliability in silicon at 90nm and 65nm process nodes. HSIM® delivers superior performance and capacity over traditional SPICE-based simulators, by applying two innovative and proprietary techniques: Hierarchical Storage and Isomorphic Matching   Hierarchical StorageTraditional SPICE-based simulators employ matrix-solving algorithms that must flatten the hierarchy that designers build into their circuit, in order to simultaneously solve for all node voltages and branch currents at every time step in a simulation. The hierarchical solver in HSIM...

。Complete and accurate cell characterization is essential for automated implementation and verification of complex system-on-chips (SoC). Capturing sufficiently accurate timing, power and signal integrity information, as well as operating condition variability for 90-nm and 65-nm technologies requires major additions to the technology information developed for previous technologies. Synopsys?NanoChar characterization system is a complete, automated, characterization solution for standard cells and other macrocells that delivers the accuracy and capabilities required for 90-nm and below process geometries.Working in conjunction with Synopsys?highly-accurate HSPICE circuit simulator, NanoChar characterization system derives critical timing, power, and signal integrity data to create open, industry-standard Liberty (.lib) and Verilog (.v) files for use by all Synopsys tools as well as other EDA tools. The NanoChar characterization system lowers...