EDA Design Page 184

Mentor Graphics日前宣布推出2006.2版Capital Harness Systems™ (CHS)，这套完整的软件工具可用于复杂电路联机系统的设计、分析、工程和生产，例如交通运输工具内部的连接线路。CHS产品包含多种完全整合式工具，使用者可从中选择最符合其需求的工具。　　 　　 Mentor Graphics每年都会为CHS套件进行两次版本升级，这些新版软件除了提供给新客户之外，还会做为升级软件提供给享有服务合约的现有客户。此次推出的2005.1版是目前最新的版本，它共为CHS所含的各种软件工具提供超过140种不同的增强功能，其中主要包括：　　 * 偏好零件的宣告和选择　　 * 可规划式版本行为 (release behavior) 　　 * 更强大的名称组合能力　　 * 支持连接器后盖 (connector backshell) 　　 * 可规划式交互参照　　 * 弹性的电路分析范围　　 * 全车线路连接图合成　　 * 分层式绝缘显示 (layered insulation display) 　　 * 更多的成本模型变量　　 * 可与UGS TeamCenter Engineering整合　　 　　「我们在2006.2版CHS中增加的许多增强功能其实都来自客户要求。」Mentor整合式电路系统部门产品行销主管Nick Smith表示，「我们在这方面一直与客户密切合作，这使我们确信无论客户采用其中任何一种工具，都会发现新版CHS软件可以为他们带来更大的价值。」 [img]http://www.mentorg.com.cn/images/products/ch_all.gif[/img] 针对电气系统设计，电气分析，系统集成/线束设计，线束工程和文档服务的产品 专门用于汽车、航空、铁路交通平台的电气系统设计。 提供四个流程: CHS: 针对大型组织，以数据为中心，从设计到实现的流程。 VeSys: 针对小型企业，以文档为中心，从设计到服务的流程。 TransDesign: 基于拓扑的系统设计和整合流程。 Logical Cable: 高灵活性的系统和线束设计工具。product:Mentor Graphics Capital Harness Systems 2006.2 Solaris Lanaguage:English Platform:/Solaris Size:266MB

::::::English Description:::::: Synopsys Technology Computer Aided Design (TCAD) offers a comprehensive suite of products that includes the industry leading process and device simulation tools, as well as a powerful GUI-driven simulation environment for managing simulation tasks and analyzing simulation results. The Synopsys TCAD process and device simulation tools support a broad range of applications such as CMOS, power, memory, optoelectronics, analog/RF and laser. In addition, Synopsys TCAD provides tools for interconnect modeling and extraction, providing critical parasitic information for optimizing chip performance. TCAD for Manufacturing (TFM)The Sentaurus TFM suite, which includes PCM Studio and PCM Library, provides a powerful environment for capturing multivariate process杁evice朿ircuit relationships in process compact models (PCMs), allowing a fast turnaround for identifying and analyzing factors that...

PathMill  is a leading-edge, industry-proven static timing analysis tool for block and full-chip timing verification. PathMill enables the custom and system-on-chip (SoC) designer to quickly detect and correct design flaws and timing . ::::::English Description:::::: PathMill  is a leading-edge, industry-proven static timing analysis tool for block and full-chip timing verification. PathMill enables the custom and system-on-chip (SoC) designer to quickly detect and correct design flaws and timingproduct:Synopsys Pathmill 2006.12 Linux Lanaguage:english Platform:Winxp/Win7 Size:47MB

ModelSim 6.6 is all about productivity. Providing a single-kernel architecture gives you the performance to do the fastest and most efficient verification. Our integrated debug environment allows you to find bugs faster. Support for all platforms means you can seamlessly move from Windows to Linux to Unix with no additional training. ModelSim transparently supports all languages and is truly language independent. If you currently own a license for ModelSim, you may download the files including; install notes, release notes, product installation and licensing information, reference docs, manuals and more:Product:ModelSim Xilinx Edition III 6.0a Lanaguage:english Platform:Winxp/Win7 Size:95MB

Mentor Graphics日前宣布推出2006.2版Capital Harness Systems™ (CHS)，这套完整的软件工具可用于复杂电路联机系统的设计、分析、工程和生产，例如交通运输工具内部的连接线路。CHS产品包含多种完全整合式工具，使用者可从中选择最符合其需求的工具。　　 　　 Mentor Graphics每年都会为CHS套件进行两次版本升级，这些新版软件除了提供给新客户之外，还会做为升级软件提供给享有服务合约的现有客户。此次推出的2005.1版是目前最新的版本，它共为CHS所含的各种软件工具提供超过140种不同的增强功能，其中主要包括：　　 * 偏好零件的宣告和选择　　 * 可规划式版本行为 (release behavior) 　　 * 更强大的名称组合能力　　 * 支持连接器后盖 (connector backshell) 　　 * 可规划式交互参照　　 * 弹性的电路分析范围　　 * 全车线路连接图合成　　 * 分层式绝缘显示 (layered insulation display) 　　 * 更多的成本模型变量　　 * 可与UGS TeamCenter Engineering整合　　 　　「我们在2006.2版CHS中增加的许多增强功能其实都来自客户要求。」Mentor整合式电路系统部门产品行销主管Nick Smith表示，「我们在这方面一直与客户密切合作，这使我们确信无论客户采用其中任何一种工具，都会发现新版CHS软件可以为他们带来更大的价值。」 [img]http://www.mentorg.com.cn/images/products/ch_all.gif[/img] 针对电气系统设计，电气分析，系统集成/线束设计，线束工程和文档服务的产品 专门用于汽车、航空、铁路交通平台的电气系统设计。 提供四个流程: CHS: 针对大型组织，以数据为中心，从设计到实现的流程。 VeSys: 针对小型企业，以文档为中心，从设计到服务的流程。 TransDesign: 基于拓扑的系统设计和整合流程。 Logical Cable: 高灵活性的系统和线束设计工具。product:Mentor Graphics Capital Harness Systems 2006.2 Lanaguage:English Platform:/WinNT/2000/XP Size:259MB

Welcome to Mentor Graphics ASIC and FPGA HDL Design Creation and Synthesis solutions. With two decades of HDL-based development tool experience, Mentor Graphics delivers a range of product solutions from concept to implementation for requirements through project management and development.Ensure the safety of in-flight hardware and meet FAA standards. Mentor delivers a best-practice methodology for requirements-based design to help you meet your DO-254 quality objectives while improving productivity.product:Mentor Graphics FPGA Advantage 7.3 linux Lanaguage:english Platform:Winxp/Win7 Size:433MB

Mentor Graphics Corporation (Nasdaq: MENT), the leader in printed circuit board (PCB) design solutions, today announced its new Expedition™ Enterprise flow for PCB systems design. This flow enables large electronics companies to leverage their multi-disciplined design team resources, and create and provide access to their intellectual property on a global basis. It also allows companies to integrate their design data with corporate PLM, and supply chain and manufacturing systems, as well as to communicate with outsourced design and manufacturing. Expedition Enterprise can significantly improve competitiveness and performance by combining advanced PCB design technology with library and design data management, and a unified constraint editing system. \”To better serve the needs of our automotive customers, we had to address the challenges,...

Mentor Graphics日前宣布推出2006.2版Capital Harness Systems™ (CHS)，这套完整的软件工具可用于复杂电路联机系统的设计、分析、工程和生产，例如交通运输工具内部的连接线路。CHS产品包含多种完全整合式工具，使用者可从中选择最符合其需求的工具。　　 　　 Mentor Graphics每年都会为CHS套件进行两次版本升级，这些新版软件除了提供给新客户之外，还会做为升级软件提供给享有服务合约的现有客户。此次推出的2005.1版是目前最新的版本，它共为CHS所含的各种软件工具提供超过140种不同的增强功能，其中主要包括：　　 * 偏好零件的宣告和选择　　 * 可规划式版本行为 (release behavior) 　　 * 更强大的名称组合能力　　 * 支持连接器后盖 (connector backshell) 　　 * 可规划式交互参照　　 * 弹性的电路分析范围　　 * 全车线路连接图合成　　 * 分层式绝缘显示 (layered insulation display) 　　 * 更多的成本模型变量　　 * 可与UGS TeamCenter Engineering整合　　 　　「我们在2006.2版CHS中增加的许多增强功能其实都来自客户要求。」Mentor整合式电路系统部门产品行销主管Nick Smith表示，「我们在这方面一直与客户密切合作，这使我们确信无论客户采用其中任何一种工具，都会发现新版CHS软件可以为他们带来更大的价值。」 [img]http://www.mentorg.com.cn/images/products/ch_all.gif[/img] 针对电气系统设计，电气分析，系统集成/线束设计，线束工程和文档服务的产品 专门用于汽车、航空、铁路交通平台的电气系统设计。 提供四个流程: CHS: 针对大型组织，以数据为中心，从设计到实现的流程。 VeSys: 针对小型企业，以文档为中心，从设计到服务的流程。 TransDesign: 基于拓扑的系统设计和整合流程。 Logical Cable: 高灵活性的系统和线束设计工具。product:Mentor Graphics Capital Harness Systems 2006.2 Linux Lanaguage:English Platform:/Linux Size:157MB

WILSONVILLE, Ore., Sept. 9, 2003 – Mentor Graphics Corp. (Nasdaq: MENT) today announced a collaboration with Xilinx, Inc. (NASDAQ: XLNX) to provide seamless operation between its FPGA Advantage™ design environment and Xilinx\’s recently announced Integrated Software Environment 6.1i (ISE). FPGA Advantage, Mentor\’s FPGA design environment, incorporates the Mentor Graphics HDL Designer Series™ design management environment, the ModelSim® simulator, the LeonardoSpectrum™ and Precision™ Synthesis tools. Integrated with Xilinx\’s new ISE 6.1i tools, FPGA Advantage delivers a complete FPGA flow that redefines the standard for productivity in programmable logic design software. Both Mentor and Xilinx are committed to providing the most complete, intuitive design solution available for FPGA design. Through their continued technology collaboration, the two companies provide designers with a comprehensive...

FPGA Advantage training will help you acquire the skills needed to maximize your usage of FPGA Advantage and improve your FPGA design process. This course will teach you how to create custom designs from concept to silicon. The lecture modules will demonstrate the FPGA Advantage design flow from the basics of creating a graphical design in HDL Designer Series, through verifying your design in the ModelSim® HDL simulator, to synthesizing and optimizing your design into a physical device with Precision RTL. Hands-on lab exercises will reinforce lecture topics and provide you with extensive tool usage experience under the guidance of ourproduct:Mentor Graphics FPGA Advantage 7.3 FPGA Lanaguage:english Platform:Winxp/Win7 Size:565MB