EDA Design Page 5

EMTP-RV Product:EMTP-RV 4.2.1 Lanaguage:english Platform:Winxp/WIN7 Size:1CD

PLS-CADD 17.22 PLS-CADD Power Line Systems – Computer Aided Design and Draft PLS-CADD is the most powerful overhead power line design program on the market. PLS-CADD runs under Microsoft Windows and features an easy to use graphical user interface. It integrates all aspects of line design into a single stand-alone program with a simple, logical, consistent interface. No other program can match the sophisticated engineering capabilities available in PLS-CADD. This sophistication and integration leads to more cost-effective designs being produced in only a fraction of the time required by traditional methods. The PLS-CADD solution is so clearly superior to any alternative that it has been adopted by more than 1600 organizations in over 125 countries. At the heart of PLS-CADD...

Cadence HDLICE 21.07 HDL-ICE is the RTL front end for Cadence Palladium emulators.  For those who have been using HDL-ICE for a while, you may not realize that there is a UNIX Command Line Interface (CLI) available (as opposed to writing a TCL QEL script).  In fact, it works very nearly like your simulator front-end.  The commands are vavlog/vavhdl for Verilog/VHDL imoprt and vaelab for synthesis (the \’va\’ is short for \’verification acceleration\’).  Just use -help on each of these to see their usage.  The only caveat here is that some of the default options are different than in QEL (e.g. memory synthesis is turned on by default in CLI, and off in QEL). product:Cadence HDLICE 21.07 Lanaguage:english Platform:Linux/Macosx Size:1DVD

EasyPower v11.0.0.8035 EasyPower™ Software The EasyPower product suite delivers a full lineup of powerful Windows®-based electrical software tools for intelligently designing, analyzing, and monitoring electrical power systems. With the fastest processing speeds on the market, EasyPower delivers instantaneous, accurate results to help you make more intelligent decisions. Watch the overview video below to learn more. Configure EasyPower for the specific tasks you perform most, then add features as needed. It’s completely customizable and scalable. Simply build your own configuration, based on the following modules, or choose one of our most popular suites. EasyPower 11.0 Update EasyPower LLC is excited to announce the release of EasyPower 11.0, with major new features including the ability to perform power flow analysis on single-phase...

Mentor Graphics Precision 2023.1 Precision FPGA Synthesis product:Mentor Graphics Precision 2023.1 Lanaguage:english Platform:Linux/Macosx Size:1DVD

Synopsys Identify 2022.09 The Identify tools enable the debugging of FPGA designs, FPGA-based proto-types, and system-on-a-chip designs. For the first time, you can debug live hardware using intuitive, HDL-based debugging techniques that provide visibility into the internal operation of your system. product:Synopsys Identify 2022.09 Lanaguage:english Platform:Linux/Macosx Size:1DVD

Synopsys SpyGlass 2022.06 Early Design Analysis Tools Enable Efficient Verification and Optimization of SoC Designs  product:Synopsys SpyGlass 2022.06 Lanaguage:english Platform:Linux/Macosx Size:1DVD

Synopsys Sentaurus 2022.12 Sentaurus Device product:Synopsys Sentaurus 2022.12 Lanaguage:english Platform:Linux/Macosx Size:1DVD

Synopsys VCS 2022.06 The Synopsys VCS® functional verification solution is the primary verification solution used by a majority of the world’s top semiconductor companies. VCS provides the industry’s highest performance simulation and constraint solver engines. VCS’ simulation engine natively takes full advantage of multicore processors with state-of-the-art Fine-Grained Parallelism (FGP) technology, enabling users to easily speed up high-activity, long-cycle tests by allocating more cores at runtime. VCS has innovative features to achieve higher performance and enable shift left verification flows early in the design cycle to catch additional bugs. Synopsys Design Constraints (SDC) Verification, Intelligent Coverage Optimization (ICO), Dynamic Performance Optimization (DPO), and Dynamic Test Loading (DTL) are innovations that significantly expand the application of the solution. In addition, the comprehensive...

Synopsys IC Compiler II (ICC2) 2022.03 sp5 The Leader in Place and Route product:Synopsys IC Compiler II (ICC2) 2022.03 sp5 Lanaguage:english Platform:Linux/Macosx Size:1DVD