EDA Design Page 51

Synopsys Identify vN-2018.03 SP1 FOR WIN/LINUX Identify RTL DebuggerSimulator-like Visibility into FPGA Hardware Operation The Identify® RTL debugger allows you to instrument RTL HDL and then, still at the RT-Level, debug the implemented FPGA on live, running hardware. The Identify FPGA debug software verifies a design in hardware, similar to simulation – only much faster and with in-system stimuli. The Identify RTL debugger allows you to designate sample triggers, navigate the design graphically, and mark signals in the RTL that are to serve as probes. After synthesis, the results are viewed and annotated onto the RTL source code, the HDL Analyst® RTL View, or third party, waveform viewer. This ensures RTL-to-implementation equivalence and correct operation of the FPGA design.Key Features...

Synopsys Fpga vN-2018.03 SP1 Synplify ProLogic Synthesis for FPGA Design Synplify Pro® FPGA synthesis software is the industry standard for producing high-performance and cost-effective FPGA designs. Synplify software supports the latest VHDL and Verilog language constructs including SystemVerilog and VHDL-2008. The software also supports FPGA architectures from a variety of FPGA vendors, including Altera, Achronix, Lattice, Microsemi and Xilinx, all from a single RTL and constraint source. Synplify Pro software uses a single, easy-to-use interface and has the ability to perform incremental synthesis and intuitive HDL code analysis.product:Synopsys Fpga vN-2018.03 SP1 Lanaguage:english Platform:Win/Linux Size:1DVD

Autodesk EAGLE Premium v9.1.2 PCB design made easy Make anything with EAGLE PCB design software. Professional power for every electronics designer. Powerful, easy-to-use tools Autodesk EAGLE is an electronic design automation (EDA) software. Enabling printed circuit board (PCB) designers to seamlessly connect schematic diagrams, component placement, PCB routing, and comprehensive library content.Product:Autodesk EAGLE Premium v9.1.2 Lanaguage:english Platform:Win7/WIN8 Size:1CD

Keysight Physical Layer Test System(PLTS) 2018Key Features & Specifications Breakthrough spatial resolution of 6 picoseconds with N5291A PNA mm-wave system (900 Hz to 120 GHz) Python-based math function support for remote programming and automation 64-port S-parameter analysis for post-measurement characterization DescriptionNEW PLTS 2018 Breakthrough Spatial Resolution of 6 PicosecondsThe new Physical Layer Test System (PLTS) 2018 has significant breakthrough capabilities with regards to resolving adjacent impedance discontinuities within high-speed interconnects, such as cables, backplanes, PCBs and connectors. Many signal integrity laboratories around the world have benefited from the power of PLTS in the R&D prototype test phase. PLTS 2018 now supports the new N5291A PNA MM-wave system that provides a single continuous sweep of 900 Hz to 120 GHz in...

Mentor Graphics Calibre 2018.2.33.24 Mentor\’s IC verification and sign-off includes not only traditional rule-based physical verification and parasitic extraction, but also new capabilities and automated technologies that help improve yield by enhancing the design itself. Calibre® is the overwhelming market share leader and the industry standard for IC physical verification, due to the outstanding performance, accuracy and reliability of Calibre products. Over the last two years, Calibre nmDRC™ has reduced average DRC runtime by a factor of five, while Calibre\’s innovative Hyperscaling and MTFlex™ technologies have cut memory requirements in half. Calibre nmDRC also reduced overall cycle time with incremental DRC, which allows designers to make DRC runs in parallel. As DRC violations are reported, designers can immediately fix and...

Cobham Opera 16.0 R1Opera provides the complete toolchain for electromagnetic design, simulation and analysis of results, for use on 32- or 64-bit Windows and Linux platforms. It consists of a powerful pre-processing environment for creating design models (or importing them from CAD programs), plus a powerful finite element analysis (FEA) solver from our range. Three generic solvers are optionally available: static electromagnetic fields (the widely used ‘Tosca’ tool) – low-frequency time-varying electromagnetic fields – high frequency time-varying electromagnetic fields* – Opera can alternatively be purchased in a number of forms optimised for specific design problems: linear and rotating machinery design – superconducting magnet quenching – space charge effects from particle beams – permanent magnet magnetisation/demagnetisation – thermal and stress analysis...

Synopsys Synplify FPGA 2018Synplify Premier solution is the industry’s most productive FPGA implementation and debug environment. It includes all the features of Synplify Pro and additionally provides a comprehensive suite of tools and technologies for advanced FPGA designers as well as ASIC prototypers targeting single FPGA-based prototypes.The Synplify Premier software delivers fast turnaround time capabilities and feedback for users seeking to quickly implement the design on the board or to tune their design projects prior to final implementation. It addresses the most challenging aspects of FPGA design including timing closure and has the ability to perform graph-based physical synthesis for more accurate upfront timing prediction. It provides flows for fast logic verification and RT-Level debug. Under the hood, it contains...

Synopsys PrimePower 2018.06 PrimePower has advantages over Design Power, said William Ruby, director of marketing for mixed-signal and low-power design at Synopsys. One is the tool’s ability to handle designs with potential capacities of up to 10 million instances. Another is PrimePower’s time-based analysis, which lets users view power dissipation as a function of time within a waveform display. PrimePower models pattern-dependent, capacitive switching, short-circuit and static power consumption, considering instance-specific cell-state dependencies, glitches, multiple loads and nonlinear ramp effects. To use PrimePower, an engineer first runs an HDL simulator and generates what Synopsys calls a PrimePower interface format (PIF) file. That contains switching activity and hierarchy information. The file is created by programming language interface routines provided with the...

Keysight SystemVue 2018SystemVue 2018 Release NotesRelease Highlights: W1461 SystemVue Core PlatformSearch Tools New Workspace Search tool allows users to search for objects, parts, parameters, variables, and text in workspaces. New Example Explorer is provided under Help menu to explore examples and search for a keyword among examples. You can right-click on any part on a schematic or in the Part Selector and select Find Examples… to open the Example Explorer with the model(s) of the part pre-populated in the search field. Part Selector now supports searching models across all libraries. Just select in Current Library and use Filter By to search a keyword. Data Flow Analysis Data Flow schematics can now annotate sample rate and characterization frequency for each node...

Mentor.Graphics.ModelSIM.SE.v10.6d In addition to supporting standard HDLs, ModelSim increases design quality and debug productivity. ModelSim’s award-winning Single Kernel Simulator (SKS) technology enables transparent mixing of VHDL and Verilog in one design. Its architecture allows platform-independent compile with the outstanding performance of native compiled code. The graphical user interface is powerful, consistent, and intuitive. All windows update automatically following activity in any other window. For example, selecting a design region in the Structure window automatically updates the Source, Signals, Process, and Variables windows. You can edit, recompile, and re-simulate without leaving the ModelSim environment. All user interface operations can be scripted and simulations can run in batch or interactive modes. ModelSim simulates behavioral, RTL, and gate-level code, including VHDL VITAL and...