Cadence GENUS 15.2
Cadence GENUS 15.2 Key Benefits Up to 10X better RTL design productivityUp to 5X faster turnaround times, with linear scalability beyond 10M instancesAt least 2X reduction in iterations between unit-, block-, and chip-level synthesisTiming and wirelength within 5% of place and route in the Cadence Innovus Implementation SystemUp to 20% reduction in datapath area without any impact on performanceThe ultimate goal of the Cadence® Genus⢠Synthesis Solution is very simple: deliver the best possible productivity during register-transfer-level (RTL) design and the highest quality of results (QoR) in final implementation. The Genus synthesis solution provides up to 5X faster synthesis turnaround times and scales linearly beyond 10M instances. In addition, a new physically aware context-generation capability reduces iterations between unit- and...