Synopsys IC Compiler vO-2018.06
Synopsys IC Compiler vO-2018.06 for linux IC CompilerPlace and Route System The IC Compiler™ place and route system is a single, convergent, chip-level physical implementation tool. It includes flat and hierarchical design planning, placement, clock tree synthesis, routing and optimization, manufacturability, and low-power capabilities that enable on schedule delivery of advanced designs. For Synopsys’ latest place-and-route system refer to IC Compiler II. IC Compiler is a complete place-and-route system for established and emerging process technology node designs. IC Compiler hierarchical design technology enables powerful design planning and early chip level exploration/analysis features to handle large, complex designs. IC Compiler delivers smaller die size with predictable design closure to reduce the cost of design. IC Compiler with Zroute digital router technology...