Tags :NanoTime 2009.06 download

The ChallengeAccurate transistor-level analysis of crosstalk-delayAs designs go down to 90-nm and below, crosstalk-delay becomes more than 25%of total delay. Prior solutions including traditional static timing analysis with optional3rd party crosstalk delay analysis do not provide the accuracy and productivity thatis required. Concurrent timing and SI is a must to achieve silicon success.Full chip timing verificationTransistor- and gate-level static timing analysis need to work together to achievefull chip timing verification (i.e) a seamless and accurate timing analysis flowfrom custom design to gate-level with PrimeTime is required. To achieve higherproductivity, NanoTime has the same commands as PrimeTime whenever theyare applicable.Concurrent timing and signal-integrity (SI) analysis provides higherpredictability and better productivityover existing solutions. NanoTimeoffers integrated timing and crosstalk-delay analysis to achieve higher...