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IAR Embedded Workbench for Renesas RH850 v2.10.1IAR Systems, a future-proof supplier of software tools and services for embedded development, announces the availability of a major update of its development tools for Renesas RH850. Release notes for IAR Embedded Workbench for Renesas RH850 version 2.10.1: Highlights – Updated IDE look and feelThe IDE has new artwork, enhancements to window management and docking, customizable toolbars, revised Information Center, and new tutorials.– Support for the C11 language standardThe compiler and libraries add support for the latest C language standard ISO/IEC 9899:2011.Note: the new C library binary object interface is incompatible with earlier versions of the product.– Support for the C++14 language standardThe compiler and libraries now support the latest C++ standard ISO/IEC 14882:2014.Note:...

IAR Embedded Workbench for 8051 v10.20.1 IAR Embedded Workbench One toolbox, one view, one uninterrupted workflow Completely integrated development environment incorporating a compiler, an assembler, a linker and a debugger.Product:IAR Embedded Workbench for 8051 v10.20.1 Lanaguage:english Platform:Win7/WIN8 Size:1CD

Synopsys Custom Waveview L-2016.06 Custom WaveViewWaveform Viewer and Simulation Post-processing Tool Custom WaveView™ is a graphical waveform viewer and simulation post-processing tool for analog and mixed-signal ICs. Custom WaveView features fast loading, display scrolling, and zooming of very large waveform files, multiple simulator format support, and a rich set of analog and mixed-signal analysis features.Product:Synopsys Custom Waveview L-2016.06 Lanaguage:english Platform:Win/Linux Size:

EMCoS.Studio.2017EMCoS Studio elevates the product development process to a higher level by seamlessly integrating the model generation process and systems simulation methodology. The result is a truly revolutionary hierarchical design approach. This approach improves the effectiveness of the whole simulation process by closing the gap between several until now isolated simulation methods. EMCoS Studio is a powerful program package for the sophisticated computer analysis of EMC-problems. EMCoS Studio was specially created to address engineers working with EMC-problems appearing in large systems like automobiles, aircrafts, ships or computer systems. EMCoS Studio applies most efficient computational techniques such as Method of Moments (MoM), Method of Auxiliary Sources (MAS), Transmission Line Methods (MTL) and Network Analysis (SPICE/PSPICE/HSPICE/LTspice/ELDO/SIMetrix solvers) in the EMC Modules to...

Pulsonix 8.5Panel Editor Panel DesignsThe new Panel Editor feature allows customers to take control over pre-fabrication processes. It enables multi-PCB designs to be panelised ready for plotting and on into the manufacturing stage. The Panel Editor is more than just a plotting station; it allows panelisation of designs, addition of test coupons, fiducial markers, documentation and fabrication details. New facilities within it allow tab-routing paths to be defined. With control over the addition of tab direction, tab thickness, tab spacing and mouse bites, it enables accurate manufacture-ready breakout tabs to be created. V-Score paths can be added using the shape tools and then processed for manufacture, all within the Panel Editor environment. Design Reuse Apply Layout PatternMultiple group selection for...

Mentor.Graphics.Calibre.2015.1for linuxCalibre® is the overwhelming market share leader and the industry standard for IC physical verification, due to the outstanding performance, accuracy and reliability of Calibre products. Over the last two years, Calibre nmDRC™ has reduced average DRC runtime by a factor of five, while Calibre\’s innovative Hyperscaling and MTFlex™ technologies have cut memory requirements in half. Calibre nmDRC also reduced overall cycle time with incremental DRC, which allows designers to make DRC runs in parallel. As DRC violations are reported, designers can immediately fix and recheck just the affected areas, while the initial DRC run continues. To handle complex and multi-variate, multi-dimensional checks that are not adequately addressed by traditional design rules, Calibre nmDRC\’s equation-based DRC (eqDRC) capability enables...

ASIC and FPGA design Mentor Graphics was the first to combine single kernel simulator (SKS) technology with a unified debug environment for Verilog, VHDL, and SystemC. The combination of industry-leading, native SKS performance with the best integrated debug and analysis environment make ModelSim® the simulator of choice for both ASIC and FPGA designs. The best standards and platform support in the industry make it easy to adopt in the majority of process and tool flows.dvanced Code Coverage ModelSim’s advanced code coverage capabilities and ease of use lower the barriers for leveraging this valuable verification resource. The ModelSim advanced code coverage capabilities provide valuable metrics for systematic verification. All coverage information is stored in the Unified Coverage DataBase (UCDB), which is...

Accelerate Design Innovation with Design Compiler® Synopsys\’ Design Compiler® family of products in the Galaxy™ Implementation Platform maximizes your productivity with its complete solution for RTL synthesis and test, Design Compiler Graphical, uses advanced optimizations and shared technology with IC Compiler place-and-route to deliver best in class quality of results for your most challenging designs at all process nodes. In addition, it enables RTL designers to predict, visualize and alleviate routing congestion and to perform floorplan exploration prior to physical implementation. Design Compiler Graphical also produces physical guidance to IC Compiler that tightens timing and area correlation and speeds-up placement runtimes. Design Compiler Graphical is built upon DC Ultra™ synthesis that concurrently optimizes for timing, area, power and test and...

he new version of EMPIRE features a completely redesigned graphical user interface with an updated arrangement of menus, navigation tree, toolbars and icons to ensure an intuitive simulation workflow.The new release 7.00 is especially optimized to process huge amount of imported CAD data, i.e. files larger than 2 GByte can be imported in less than 2 minutes. Many other customer requests have been taken into consideration in order to account for the challenges in today\’s design tasks. New features include: Advanced parametric modelling, including symbolic equations New wizards for far field and port array setup, layout import, multiple copy Extended pick-and-place library for embedded projects, surface objects, layout features Circuit simulation module including tuning and optimization capabilities Field source excitation...

New technologies in Allegro and OrCAD 16.5 include advanced miniaturization capabilities, integrated power delivery network analysis, DDR3 design-in kit, bolstered co-design featured and flexible team-design enablement to address global designer productivity. Cadence Design Systems, Inc., a leader in global electronic design innovation, launched the Cadence OrCAD 16.6 design solution with new features, enhanced customization capabilities, and 20 percent simulation performance improvements that provide customers a shorter, more predictable path to product creation. This latest release offers numerous improvements to tool usability and performance, but at the heart of 16.6 are three key benefits: enhanced miniaturization capabilities, timing-aware physical implementation and verification for faster timing closure, and the industry’s first electrical CAD team collaboration environment for PCB design using Microsoft SharePoint...