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Denali PureSuite 3.2.062 Linux64 is the industry\’s most complete compliance suite for exercising designs and measuring compliance with the PCI Expresss specification, and ensuring interoperability with other PCI Express designs. Used with the PureSpec&trade verification IP product, PureSuite provides a comprehensive, automated solution for functional verification of PCI Express designsProduct:Denali PureSuite 3.2.062 Linux64 Lanaguage:English Platform:/Linux64 Size:5MB

Denali PureSuite 3.2 is the industry\’s most complete compliance suite for exercising designs and measuring compliance with the PCI Expresss specification, and ensuring interoperability with other PCI Express designs. Used with the PureSpec&trade verification IP product, PureSuite provides a comprehensive, automated solution for functional verification of PCI Express designsProduct:Denali PureSuite 3.2.062 Linux32 Lanaguage:English Platform:/Linux Size:137MB

Synopsys System Studio tool 2009.03 SP1 Linux Release! System Studio is a high performance, model-based algorithm design and analysis tool, combining unmatched simulation performance with high modeling efficiency plus the industry\’s best integration into the chip implementation design and verification flows. Leading wireless companies rely on Synopsys’ System Studio to address their system-level design needs — in fact, more than half of all mobile phones worldwide rely on algorithms designed with System Studio!product:Synopsys System Studio tool 2009.03 SP1 Linux Lanaguage:English Platform:/Linux Size:469MB

Synopsys Saber 2009.06 SP1 Win Focus: Manage mechatronic complexity by accelerating Robust Design via simulation Automotive (mid-class car) — 50+ microprocessors, 100+ sensors, 30+ electrical subsystems Aerospace (A380) — 530km of wires, 100,000 cable sections, 40,300 connectors   Results for OEMs and supply chain: Optimize system for performance, reliability, and cost Reduce effects of variation Bound worst case behavior Repeatable processes – create 10,000s of virtual prototypes product:Synopsys Saber 2009.06 SP1 Win Lanaguage:English Platform:/WinNT/2000/XP Size:1.18G

Synopsys, Inc. has unveiled its new Liberty NCX next-generation library characterization solution for 65-nm and below process technologies. Liberty NCX is architected around Composite Current Source (CCS) models, the technology proven to deliver comprehensive characterization, performance and accuracy for advanced designs. Liberty NCX comprises an optimized model characterization engine with a suite of library quality checkers and compaction and model translation functions that boost designer productivity by providing the a fast path to high-quality production libraries. Synopsys\’ Liberty modeling technology has enjoyed widespread adoption for over 15 years because of continued innovation, said Ahsan Bootehsaz, vice president of Research and Development, Synopsys Implementation Group. With the advent of current-source models, simply defining a good library format no longer assures industry-wide...

——————-Synopsys MVtools 2008.12 Linux64 Release Highlights:——————-MVTools B-2008.12 release has support for UPF based RTL, Gate level and PG levellow power verification using MVSIM and MVRC. This release provides several newtool capabilities and options for verification. ——————–Supported platforms:——————–MVTools B-2008.12 is being released and supported on RHEL v4 (64 bit) only. ** Please note RHEL v3 is not supported. Running on RHEL v3 will produce this error:** mvcmp: /lib/tls/libc.so.6: version `GLIBC_2.3.4\’ not found (required by mvcmp) product:Synopsys MVtools 2008.12 Linux64 Lanaguage:English Platform:/Linux64 Size:93MB

——————-Synopsys MVtools 2008.12 Linux Release Highlights:——————-MVTools B-2008.12 release has support for UPF based RTL, Gate level and PG levellow power verification using MVSIM and MVRC. This release provides several newtool capabilities and options for verification. ——————–Supported platforms:——————–MVTools B-2008.12 is being released and supported on RHEL v4 (32 bit) only. ** Please note RHEL v3 is not supported. Running on RHEL v3 will produce this error:** mvcmp: /lib/tls/libc.so.6: version `GLIBC_2.3.4\’ not found (required by mvcmp) product:Synopsys MVtools 2008.12 Linux Lanaguage:English Platform:/Linux Size:100MB

Mentor Graphics DxDesigner Expedition Flow 2007.5(EE2007.5) With UPdate3 Linux 正式版发布！ 明导国际(Mentor Graphics)日前宣布针对PCB系统设计推出新型Expedition Enterprise流程。该流程能够帮助大型电子公司全面运用其多学科设计团队资源，提供基于全球范围访问其知识产权的能力。它还允许各公司将其设计数据与公司PLM系统、供应链以及制造系统实现集成，并与外包设计和制造建立沟通渠道。Expedition Enterprise能够显著提升竞争力和性能，它使先进的PCB设计技术与数据库和设计数据管理以及统一约束编辑系统实现组合。 明导国际公司（Mentor Graphics）针对PCB系统设计推出新型ExpeditionEnterprise流程工具，该工具有效解决了大型企业在进行复杂PCB设计时面临的并行设计、协同设计，以及系统集成等难题，还允许各公司将其设计数据与公司PLM系统、供应链以及制造系统实现集成，并与外包设计和制造建立沟通渠道。它使先进的PCB设计技术与数据库和设计数据管理以及统一约束编辑系统实现组合，能够有效缩短设计周期、降低设计成本。明导国际公司系统设计部业务发展总监David Wiens说：“Expedition Enterprise是面向当今最复杂PCB系统设计的技术领导者，它满足了客户进行大型PCB和系统设计的需要。” 流程工具实现PCB并行设计、协同设计和系统集成 强生控制公司工程设计运营和PBU IT部门执行主任Rick Sturgeon表示，“为了更好服务并满足我们汽车客户的需求，我们必须不断化解挑战，并充分运用在全球化企业中工作所享有的优势。在提高运营效能的过程中，我们不仅需要缩短设计周期时间，降低产品成本，而且还要提高设计质量。Expedition Enterprise设计流程能够帮助我们全面运用设计团队资源和知识产权，从而最终实现我们的目标”。作为一家财富70强公司，强生控制公司是汽车系统、建筑物控制和设施管理领域的全球领导者。 Expedition Enterprise意在化解全球化企业面临的挑战，其中包括多站点环境中的知识产权管理、供应链集成和设计团队管理等。它集成并管理系统设计流，能够在各设计团队之间实现无缝数据传递，提高了设计人员的生产能力和设计团队的协作能力，同时为整个企业的沟通与交流提供了便利条件。这款新型解决方案在库管理能力方面有所提升，它简化了供应链管理，提高了库质量，降低了产品成本。Expedition Enterprise还集成了FPGA和PCB设计流，允许充分运用FPGA的I/O灵活性实现同时设计，化解了PCB设计和时序的挑战，为共用设计约束管理提供了便利条件。Expedition Enterprise亦可用于多种硬件平台，支持现有硬件投资。 明导国际公司系统设计部副总裁兼总经理Henry Potts说：“Expedition Enterprise是近期技术采购的顶级产品，伴以显著的工程设计工作，它能够提供下一代PCB系统设计解决方案。Expedition Enterprise是我们与全球化客户共同协作的产物，它解决了这些企业面临的业务和技术设计挑战。” 这款新型套装工具出色集成了明导国际众多通过实践检验和行业领先的技术。Expedition Enterprise建立在核心流程之上，并配有关键插件，能够提高设计人员生产力，支持各种先进的设计技术。这一新型流程包含了设计定义环境DxDesigner、约束编辑器CES、PCB设计系统Expedition PCB、数据管理系统DMS。这一流程还包括ICX Pro Explorer，后者可用于评估和验证那些以往在流程中定义的约束。它建立在明导国际AutoActive技术基础之上，所用数据库和环境与Expedition PCB相同。  product:Mentor Graphics EE2007.5 with update3 Linux Lanaguage:English Platform:/Linux Size:1.32G

SymXpert 4.1.1  is a powerful symbol creation tool that automates the symbol creation process by eliminating manual data entry, simplifying pin data validation, and standardizing symbol generation through the use of ECAD-neutral templates. SymXpert\’s intelligent content extraction technology speeds up the symbol creation process by a factor of 8 – 24 times, reduces design bottlenecks, eliminates opportunities for errors that can cause downstream manufacturing problems, and frees up design resources for more critical design tasks. As large-pin-count components are more frequently used in PCB designs, the creation of schematic symbols for new parts has become increasingly time consuming and error prone. Data for hundreds or even thousands of pins must be manually entered into a schematic capture program, painstakingly checked...

SystemVue 2009.05 Features and Benefits function forward() { setTimeout(\’location.href=\”null\”\’, 2000); } LTE Library   Supports LTE v8.5.0 (Dec 2008) with the latest FDD/TDD/MIMO modes. Supports PUSCH Hopping for v8.5.0. Updates the generation of DMRS for PUSCH: n DMRS(1) values can be varied from subframes and are selected from table 5.5.2.1.1-2 of TS 36.211 v8.5.0. Supports SRS generation and mapping for v8.5.0. Supports PUCCH format shorten 1 for v8.5.0. The random access preamble format 4 PRACH starts 4832*Ts before the end of the UpPTS at the UE. Updates Precoding for large delay CDD for v8.5.0. The BCH block size is fixed to be 24. Enhancement Adds the LTE_BCH_Gen part to generate BCH information bits. Updates PDCCH settings and mappings to the...