Tags :Synthesis 2014.09 SP3

Accelerate Design Innovation with Design Compiler® Synopsys\’ Design Compiler® family of products in the Galaxy™ Implementation Platform maximizes your productivity with its complete solution for RTL synthesis and test, Design Compiler Graphical, uses advanced optimizations and shared technology with IC Compiler place-and-route to deliver best in class quality of results for your most challenging designs at all process nodes. In addition, it enables RTL designers to predict, visualize and alleviate routing congestion and to perform floorplan exploration prior to physical implementation. Design Compiler Graphical also produces physical guidance to IC Compiler that tightens timing and area correlation and speeds-up placement runtimes. Design Compiler Graphical is built upon DC Ultra™ synthesis that concurrently optimizes for timing, area, power and test and...

Accelerate Design Innovation with Design Compiler® Synopsys\’ Design Compiler® family of products in the Galaxy™ Implementation Platform maximizes your productivity with its complete solution for RTL synthesis and test, Design Compiler Graphical, uses advanced optimizations and shared technology with IC Compiler place-and-route to deliver best in class quality of results for your most challenging designs at all process nodes. In addition, it enables RTL designers to predict, visualize and alleviate routing congestion and to perform floorplan exploration prior to physical implementation. Design Compiler Graphical also produces physical guidance to IC Compiler that tightens timing and area correlation and speeds-up placement runtimes. Design Compiler Graphical is built upon DC Ultra™ synthesis that concurrently optimizes for timing, area, power and test and...