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Synopsys VCS Verification IP 2012.12

Industry-leading designers of today’s most advanced designs rely on the Synopsys VCS© functional verification solution for their verification environments. In fact, 90% of designs at 32nm and below are verified with VCS. Used by a majority of the world’s top 20 semiconductor companies as their primary verification solution,VCS provides the high performance simulation engines, constraint solver engines, Native Testbench (NTB) support, broad SystemVerilog support, verification planning, coverage analysis and closure, and an integrated debug environment. VCS has continually pioneered numerous industry-first innovations, and is now poised to meet the challenges and complexity of today’s SoCs. With features such as constrained random testbench, SoC optimized compile flow, coverage, and assertions, VCS has the flexibility and capabilities that are critical for today’s...

Synopsys VCS MX vG-2012.09 LINUX

Highest-throughput mixed-signal simulation with CustomSim and VCS The majority of today’s designs contain significant analog and mixed-signal content. Even SoCs that are designed for essentially digital functions still require PLLs for timing control, digitally-controlled power management circuits, and high-speed I/O devices. To complete verification of SoCs that contain a combination of RTL and synthesized logic, along with custom digital and analog circuits; Discovery AMS analog/digital co-simulation provides a direct kernel integration between Synopsys CustomSim, VCS and VCS-MX. Overview OverviewDiscovery AMS provides a comprehensive environment that enables verification of full-chip mixed-signal designs with built-in support for Verilog-AMS language defined by the Accellera 2.0 standard. It provides a unique combination of accuracy, performance and capacity with the flexibility of simulating design abstractions...

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